Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:12.2 (WebPack) - M.63c Target Family: Spartan3E
OS Platform: NT64 Target Device: xc3s1600e
Project ID (random number) d9c680e0730a4f5dbdecda7418b6a67c.433fe79e8f3c4dfba78e2c1c786e3780.20 Target Package: fg320
Registration ID 175299972_0_410 Target Speed: -4
Date Generated 2016-07-26T17:07:49 Tool Flow CommandLine
 
User Environment
OS Name Microsoft OS Release major release (build 9200)
CPU Name Intel(R) Core(TM) i7 CPU 920 @ 2.67GHz CPU Speed 2660 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
  MiscellaneousStatistics
  • AGG_BONDED_IO=195
  • AGG_IO=195
  • AGG_SLICE=12668
  • NUM_4_INPUT_LUT=20158
  • NUM_BONDED_DIFFM=52
  • NUM_BONDED_DIFFS=52
  • NUM_BONDED_IBUF=36
  • NUM_BONDED_IOB=55
  • NUM_BUFGMUX=3
  • NUM_CYMUX=6727
  • NUM_DP_RAM=108
  • NUM_IOB_FF=22
  • NUM_LUT_RT=2257
  • NUM_MULT18X18SIO=2
  • NUM_MULTAND=63
  • NUM_RAMB16=20
  • NUM_SHIFT=3
  • NUM_SLICEL=12612
  • NUM_SLICEM=56
  • NUM_SLICE_FF=15181
  • NUM_XOR=6178
  • Xilinx Core blk_mem_gen_v2_4, Coregen 9.1.03i_ip3=1
  • Xilinx Core blk_mem_gen_v2_5, Coregen 9.2.04i_ip2=16
NetStatistics
  • NumNets_Active=26021
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMADDR=437
  • NumNodesOfType_Active_BRAMDUMMY=361
  • NumNodesOfType_Active_CLKPIN=8954
  • NumNodesOfType_Active_CNTRLPIN=10451
  • NumNodesOfType_Active_DOUBLE=47388
  • NumNodesOfType_Active_DUMMY=52751
  • NumNodesOfType_Active_DUMMYBANK=364
  • NumNodesOfType_Active_DUMMYESC=50
  • NumNodesOfType_Active_GLOBAL=797
  • NumNodesOfType_Active_HFULLHEX=639
  • NumNodesOfType_Active_HLONG=203
  • NumNodesOfType_Active_HUNIHEX=3710
  • NumNodesOfType_Active_INPUT=62302
  • NumNodesOfType_Active_IOBOUTPUT=54
  • NumNodesOfType_Active_OMUX=26315
  • NumNodesOfType_Active_OUTPUT=25235
  • NumNodesOfType_Active_PREBXBY=16051
  • NumNodesOfType_Active_VFULLHEX=2585
  • NumNodesOfType_Active_VLONG=669
  • NumNodesOfType_Active_VUNIHEX=3616
SiteStatistics
  • IBUF-DIFFM=3
  • IBUF-DIFFMI=5
  • IBUF-DIFFS=4
  • IBUF-DIFFSI=4
  • IBUF-IOB=8
  • IOB-DIFFM=23
  • IOB-DIFFS=25
  • SLICEL-SLICEM=6080
SiteSummary
  • BUFGMUX=3
  • BUFGMUX_GCLKMUX=3
  • BUFGMUX_GCLK_BUFFER=3
  • DIFFM=52
  • DIFFM_IFD_DELAY=3
  • DIFFM_IFF1=3
  • DIFFM_IFF2=1
  • DIFFM_INBUF=23
  • DIFFM_OFF1=18
  • DIFFM_OUTBUF=29
  • DIFFM_PAD=52
  • DIFFS=52
  • DIFFS_DIFFO_IN_USED=29
  • DIFFS_OUTBUF=29
  • DIFFS_PAD=52
  • DIFFS_PADOUT_USED=23
  • IBUF=36
  • IBUF_INBUF=36
  • IBUF_PAD=36
  • IOB=55
  • IOB_INBUF=8
  • IOB_OUTBUF=55
  • IOB_PAD=55
  • MULT18X18SIO=2
  • MULT18X18SIO_MULT18X18SIO=2
  • RAMB16=20
  • RAMB16_RAMB16=20
  • RAMB16_RAMB16A=20
  • RAMB16_RAMB16B=19
  • SLICEL=12612
  • SLICEL_C1VDD=1021
  • SLICEL_C2VDD=949
  • SLICEL_CYMUXF=3530
  • SLICEL_CYMUXG=3197
  • SLICEL_F=10029
  • SLICEL_F5MUX=1233
  • SLICEL_F6MUX=95
  • SLICEL_FAND=32
  • SLICEL_FFX=7922
  • SLICEL_FFY=7257
  • SLICEL_G=10018
  • SLICEL_GAND=31
  • SLICEL_GNDF=1764
  • SLICEL_GNDG=1507
  • SLICEL_VDDF=48
  • SLICEL_VDDG=32
  • SLICEL_XORF=3072
  • SLICEL_XORG=3106
  • SLICEM=56
  • SLICEM_F=55
  • SLICEM_FFX=1
  • SLICEM_FFY=1
  • SLICEM_G=56
  • SLICEM_GMC15_BLACKBOX=1
  • SLICEM_WSGEN=56
 
Configuration Data
BUFGMUX
  • S=[S_INV:3] [S:0]
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:3]
  • S=[S_INV:3] [S:0]
DIFFM
  • ICE=[ICE:1] [ICE_INV:0]
  • ICLK1=[ICLK1_INV:1] [ICLK1:2]
  • ICLK2=[ICLK2_INV:0] [ICLK2:1]
  • O1=[O1_INV:20] [O1:9]
  • OCE=[OCE:17] [OCE_INV:0]
  • OTCLK1=[OTCLK1_INV:1] [OTCLK1:17]
  • SR=[SR:1] [SR_INV:0]
DIFFM_IFF1
  • CE=[CE:1] [CE_INV:0]
  • CK=[CK:2] [CK_INV:1]
  • IFF1_INIT_ATTR=[INIT0:3]
  • IFF1_SR_ATTR=[SRLOW:1]
  • IFFATTRBOX=[ASYNC:1]
  • LATCH_OR_FF=[FF:3]
  • SR=[SR:1] [SR_INV:0]
DIFFM_IFF2
  • CK=[CK:1] [CK_INV:0]
  • IFF2_INIT_ATTR=[INIT0:1]
  • LATCH_OR_FF=[FF:1]
DIFFM_INBUF
  • IFD_DELAY_VALUE=[DLY3:3]
DIFFM_OFF1
  • CE=[CE:17] [CE_INV:0]
  • CK=[CK:17] [CK_INV:1]
  • D=[D:1] [D_INV:17]
  • LATCH_OR_FF=[FF:18]
  • OFF1_INIT_ATTR=[INIT0:18]
DIFFM_OUTBUF
  • IN=[IN_INV:3] [IN:26]
DIFFM_PAD
  • DIFF_TERM=[TRUE:23]
  • IOATTRBOX=[LVDS_25:52]
DIFFS_PAD
  • DIFF_TERM=[TRUE:23]
  • IOATTRBOX=[LVDS_25:52]
IBUF_PAD
  • IOATTRBOX=[LVCMOS25:36]
  • PULL=[PULLUP:8]
IOB
  • O1=[O1_INV:0] [O1:55]
  • T1=[T1_INV:0] [T1:8]
IOB_OUTBUF
  • IN=[IN_INV:0] [IN:55]
  • TRI=[TRI_INV:0] [TRI:8]
IOB_PAD
  • DRIVEATTRBOX=[12:55]
  • IOATTRBOX=[LVCMOS25:55]
  • SLEW=[SLOW:55]
MULT18X18SIO
  • CEA=[CEA_INV:0] [CEA:2]
  • CEB=[CEB_INV:0] [CEB:2]
  • CEP=[CEP:2] [CEP_INV:0]
  • CLK=[CLK:2] [CLK_INV:0]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:2]
MULT18X18SIO_MULT18X18SIO
  • AREG=[0:2]
  • BREG=[0:1] [1:1]
  • B_INPUT=[DIRECT:2]
  • CEA=[CEA_INV:0] [CEA:2]
  • CEB=[CEB_INV:0] [CEB:2]
  • CEP=[CEP:2] [CEP_INV:0]
  • CLK=[CLK:2] [CLK_INV:0]
  • PREG=[0:1] [1:1]
  • PREG_CLKINVERSION=[0:2]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:2]
RAMB16
  • CLKA=[CLKA_INV:0] [CLKA:20]
  • CLKB=[CLKB_INV:0] [CLKB:19]
  • ENA=[ENA_INV:0] [ENA:20]
  • ENB=[ENB_INV:0] [ENB:19]
  • SSRA=[SSRA_INV:0] [SSRA:20]
  • SSRB=[SSRB_INV:0] [SSRB:19]
  • WEA=[WEA:20] [WEA_INV:0]
  • WEB=[WEB:19] [WEB_INV:0]
RAMB16_RAMB16A
  • CLKA=[CLKA_INV:0] [CLKA:20]
  • ENA=[ENA_INV:0] [ENA:20]
  • PORTA_ATTR=[16384X1:16] [2048X9:1] [1024X18:3]
  • SSRA=[SSRA_INV:0] [SSRA:20]
  • WEA=[WEA:20] [WEA_INV:0]
  • WRITEMODEA=[WRITE_FIRST:20]
RAMB16_RAMB16B
  • CLKB=[CLKB_INV:0] [CLKB:19]
  • ENB=[ENB_INV:0] [ENB:19]
  • PORTB_ATTR=[512X36:1] [2048X9:16] [1024X18:2]
  • SSRB=[SSRB_INV:0] [SSRB:19]
  • WEB=[WEB:19] [WEB_INV:0]
  • WRITEMODEB=[WRITE_FIRST:19]
SLICEL
  • BX=[BX_INV:11] [BX:3407]
  • BY=[BY:2196] [BY_INV:90]
  • CE=[CE:5331] [CE_INV:1444]
  • CIN=[CIN_INV:0] [CIN:3173]
  • CLK=[CLK:8710] [CLK_INV:127]
  • SR=[SR:3176] [SR_INV:425]
SLICEL_CYMUXF
  • 0=[0:3482] [0_INV:0]
  • 1=[1_INV:4] [1:3526]
SLICEL_CYMUXG
  • 0=[0:3165] [0_INV:0]
SLICEL_F5MUX
  • S0=[S0:1233] [S0_INV:0]
SLICEL_F6MUX
  • S0=[S0:95] [S0_INV:0]
SLICEL_FFX
  • CE=[CE:4956] [CE_INV:1376]
  • CK=[CK:7896] [CK_INV:26]
  • D=[D:7915] [D_INV:7]
  • FFX_INIT_ATTR=[INIT0:6793] [INIT1:1129]
  • FFX_SR_ATTR=[SRLOW:6768] [SRHIGH:1154]
  • LATCH_OR_FF=[FF:7922]
  • REV=[REV_INV:0] [REV:91]
  • SR=[SR:2839] [SR_INV:327]
  • SYNC_ATTR=[ASYNC:5966] [SYNC:1956]
SLICEL_FFY
  • CE=[CE:4763] [CE_INV:882]
  • CK=[CK:7139] [CK_INV:118]
  • D=[D:7167] [D_INV:90]
  • FFY_INIT_ATTR=[INIT0:6602] [INIT1:655]
  • FFY_SR_ATTR=[SRLOW:6606] [SRHIGH:651]
  • LATCH_OR_FF=[FF:7257]
  • REV=[REV_INV:0] [REV:6]
  • SR=[SR:2353] [SR_INV:423]
  • SYNC_ATTR=[ASYNC:5751] [SYNC:1506]
SLICEL_XORF
  • 1=[1_INV:4] [1:3068]
SLICEM
  • BY=[BY:56] [BY_INV:0]
  • CE=[CE:1] [CE_INV:0]
  • CLK=[CLK:56] [CLK_INV:0]
  • SR=[SR:56] [SR_INV:0]
SLICEM_F
  • DI=[DI:55] [DI_INV:0]
  • F_ATTR=[DUAL_PORT:54] [SHIFT_REG:1]
  • LUT_OR_MEM=[RAM:55]
SLICEM_FFX
  • CE=[CE:1] [CE_INV:0]
  • CK=[CK:1] [CK_INV:0]
  • D=[D:1] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:1]
  • FFX_SR_ATTR=[SRLOW:1]
  • LATCH_OR_FF=[FF:1]
  • SYNC_ATTR=[ASYNC:1]
SLICEM_FFY
  • CK=[CK:1] [CK_INV:0]
  • D=[D:1] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:1]
  • FFY_SR_ATTR=[SRLOW:1]
  • LATCH_OR_FF=[FF:1]
  • SYNC_ATTR=[ASYNC:1]
SLICEM_G
  • DI=[DI:56] [DI_INV:0]
  • G_ATTR=[DUAL_PORT:54] [SHIFT_REG:2]
  • LUT_OR_MEM=[RAM:56]
SLICEM_WSGEN
  • CK=[CK:56] [CK_INV:0]
  • SYNC_ATTR=[ASYNC:2]
  • WE=[WE_INV:0] [WE:56]
 
Pin Data
BUFGMUX
  • I0=3
  • O=3
  • S=3
BUFGMUX_GCLKMUX
  • I0=3
  • OUT=3
  • S=3
BUFGMUX_GCLK_BUFFER
  • IN=3
  • OUT=3
DIFFM
  • DIFFI_IN=23
  • DIFFO_OUT=29
  • I=22
  • ICE=1
  • ICLK1=3
  • ICLK2=1
  • IQ1=3
  • IQ2=1
  • O1=29
  • OCE=17
  • OTCLK1=18
  • PAD=52
  • SR=1
DIFFM_IFD_DELAY
  • IN=3
  • OUT=3
DIFFM_IFF1
  • CE=1
  • CK=3
  • D=3
  • Q=3
  • SR=1
DIFFM_IFF2
  • CK=1
  • D=1
  • Q=1
DIFFM_INBUF
  • DIFFI_IN=23
  • OUT=23
  • PAD=23
DIFFM_OFF1
  • CE=17
  • CK=18
  • D=18
  • Q=18
DIFFM_OUTBUF
  • IN=29
  • OUTN=29
  • OUTP=29
DIFFM_PAD
  • PAD=52
DIFFS
  • DIFFO_IN=29
  • PAD=52
  • PADOUT=23
DIFFS_DIFFO_IN_USED
  • 0=29
  • OUT=29
DIFFS_OUTBUF
  • DIFFO_IN=29
  • OUTP=29
DIFFS_PAD
  • PAD=52
DIFFS_PADOUT_USED
  • 0=23
  • OUT=23
IBUF
  • I=36
  • PAD=36
IBUF_INBUF
  • IN=36
  • OUT=36
IBUF_PAD
  • PAD=36
IOB
  • I=8
  • O1=55
  • PAD=55
  • T1=8
IOB_INBUF
  • IN=8
  • OUT=8
IOB_OUTBUF
  • IN=55
  • OUT=55
  • TRI=8
IOB_PAD
  • PAD=55
MULT18X18SIO
  • A0=2
  • A1=2
  • A10=2
  • A11=2
  • A12=2
  • A13=2
  • A14=2
  • A15=2
  • A16=2
  • A17=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • A7=2
  • A8=2
  • A9=2
  • B0=2
  • B1=2
  • B10=2
  • B11=2
  • B12=2
  • B13=2
  • B14=2
  • B15=2
  • B16=2
  • B17=2
  • B2=2
  • B3=2
  • B4=2
  • B5=2
  • B6=2
  • B7=2
  • B8=2
  • B9=2
  • CEA=2
  • CEB=2
  • CEP=2
  • CLK=2
  • P0=2
  • P1=2
  • P10=2
  • P11=2
  • P12=2
  • P13=2
  • P14=2
  • P15=2
  • P16=2
  • P17=2
  • P18=2
  • P19=2
  • P2=2
  • P20=2
  • P21=2
  • P22=2
  • P23=2
  • P24=2
  • P25=2
  • P26=2
  • P27=1
  • P28=1
  • P29=1
  • P3=2
  • P30=1
  • P31=1
  • P32=1
  • P33=1
  • P34=1
  • P35=1
  • P4=2
  • P5=2
  • P6=2
  • P7=2
  • P8=2
  • P9=2
  • RSTA=2
  • RSTB=2
  • RSTP=2
MULT18X18SIO_MULT18X18SIO
  • A0=2
  • A1=2
  • A10=2
  • A11=2
  • A12=2
  • A13=2
  • A14=2
  • A15=2
  • A16=2
  • A17=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • A7=2
  • A8=2
  • A9=2
  • B0=2
  • B1=2
  • B10=2
  • B11=2
  • B12=2
  • B13=2
  • B14=2
  • B15=2
  • B16=2
  • B17=2
  • B2=2
  • B3=2
  • B4=2
  • B5=2
  • B6=2
  • B7=2
  • B8=2
  • B9=2
  • CEA=2
  • CEB=2
  • CEP=2
  • CLK=2
  • P0=2
  • P1=2
  • P10=2
  • P11=2
  • P12=2
  • P13=2
  • P14=2
  • P15=2
  • P16=2
  • P17=2
  • P18=2
  • P19=2
  • P2=2
  • P20=2
  • P21=2
  • P22=2
  • P23=2
  • P24=2
  • P25=2
  • P26=2
  • P27=1
  • P28=1
  • P29=1
  • P3=2
  • P30=1
  • P31=1
  • P32=1
  • P33=1
  • P34=1
  • P35=1
  • P4=2
  • P5=2
  • P6=2
  • P7=2
  • P8=2
  • P9=2
  • RSTA=2
  • RSTB=2
  • RSTP=2
RAMB16
  • ADDRA0=16
  • ADDRA1=16
  • ADDRA10=20
  • ADDRA11=20
  • ADDRA12=20
  • ADDRA13=20
  • ADDRA2=16
  • ADDRA3=17
  • ADDRA4=20
  • ADDRA5=20
  • ADDRA6=20
  • ADDRA7=20
  • ADDRA8=20
  • ADDRA9=20
  • ADDRB10=19
  • ADDRB11=19
  • ADDRB12=19
  • ADDRB13=19
  • ADDRB3=16
  • ADDRB4=18
  • ADDRB5=19
  • ADDRB6=19
  • ADDRB7=19
  • ADDRB8=19
  • ADDRB9=19
  • CLKA=20
  • CLKB=19
  • DIA0=17
  • DIA1=1
  • DIA2=1
  • DIA3=1
  • DIA4=1
  • DIA5=1
  • DIA6=1
  • DIA7=1
  • DIB0=3
  • DIB1=3
  • DIB10=3
  • DIB11=3
  • DIB12=3
  • DIB13=3
  • DIB14=3
  • DIB15=3
  • DIB16=1
  • DIB17=1
  • DIB18=1
  • DIB19=1
  • DIB2=3
  • DIB20=1
  • DIB21=1
  • DIB22=1
  • DIB23=1
  • DIB24=1
  • DIB25=1
  • DIB26=1
  • DIB27=1
  • DIB28=1
  • DIB29=1
  • DIB3=3
  • DIB30=1
  • DIB31=1
  • DIB4=3
  • DIB5=3
  • DIB6=3
  • DIB7=3
  • DIB8=3
  • DIB9=3
  • DIPA0=1
  • DIPB0=3
  • DIPB1=3
  • DIPB2=1
  • DIPB3=1
  • DOA0=20
  • DOA1=4
  • DOA10=3
  • DOA11=3
  • DOA12=3
  • DOA13=3
  • DOA14=3
  • DOA15=2
  • DOA2=4
  • DOA3=4
  • DOA4=4
  • DOA5=4
  • DOA6=4
  • DOA7=3
  • DOA8=3
  • DOA9=3
  • DOB0=17
  • DOB1=17
  • DOB10=1
  • DOB11=1
  • DOB12=1
  • DOB13=1
  • DOB14=1
  • DOB15=1
  • DOB16=1
  • DOB17=1
  • DOB18=1
  • DOB19=1
  • DOB2=17
  • DOB20=1
  • DOB21=1
  • DOB22=1
  • DOB23=1
  • DOB24=1
  • DOB25=1
  • DOB26=1
  • DOB27=1
  • DOB28=1
  • DOB29=1
  • DOB3=17
  • DOB30=1
  • DOB31=1
  • DOB4=17
  • DOB5=17
  • DOB6=17
  • DOB7=17
  • DOB8=1
  • DOB9=1
  • DOPA0=2
  • DOPA1=2
  • DOPB0=1
  • DOPB1=1
  • DOPB2=1
  • DOPB3=1
  • ENA=20
  • ENB=19
  • SSRA=20
  • SSRB=19
  • WEA=20
  • WEB=19
RAMB16_RAMB16
  • ADDRA=20
  • ADDRB=19
  • DIA=20
  • DIB=19
  • DOA=20
  • DOB=19
RAMB16_RAMB16A
  • ADDRA=20
  • ADDRA0=16
  • ADDRA1=16
  • ADDRA10=20
  • ADDRA11=20
  • ADDRA12=20
  • ADDRA13=20
  • ADDRA2=16
  • ADDRA3=17
  • ADDRA4=20
  • ADDRA5=20
  • ADDRA6=20
  • ADDRA7=20
  • ADDRA8=20
  • ADDRA9=20
  • CLKA=20
  • DIA=20
  • DIA0=17
  • DIA1=1
  • DIA2=1
  • DIA3=1
  • DIA4=1
  • DIA5=1
  • DIA6=1
  • DIA7=1
  • DIPA0=1
  • DOA=20
  • DOA0=20
  • DOA1=4
  • DOA10=3
  • DOA11=3
  • DOA12=3
  • DOA13=3
  • DOA14=3
  • DOA15=2
  • DOA2=4
  • DOA3=4
  • DOA4=4
  • DOA5=4
  • DOA6=4
  • DOA7=3
  • DOA8=3
  • DOA9=3
  • DOPA0=2
  • DOPA1=2
  • ENA=20
  • SSRA=20
  • WEA=20
RAMB16_RAMB16B
  • ADDRB=19
  • ADDRB10=19
  • ADDRB11=19
  • ADDRB12=19
  • ADDRB13=19
  • ADDRB3=16
  • ADDRB4=18
  • ADDRB5=19
  • ADDRB6=19
  • ADDRB7=19
  • ADDRB8=19
  • ADDRB9=19
  • CLKB=19
  • DIB=19
  • DIB0=3
  • DIB1=3
  • DIB10=3
  • DIB11=3
  • DIB12=3
  • DIB13=3
  • DIB14=3
  • DIB15=3
  • DIB16=1
  • DIB17=1
  • DIB18=1
  • DIB19=1
  • DIB2=3
  • DIB20=1
  • DIB21=1
  • DIB22=1
  • DIB23=1
  • DIB24=1
  • DIB25=1
  • DIB26=1
  • DIB27=1
  • DIB28=1
  • DIB29=1
  • DIB3=3
  • DIB30=1
  • DIB31=1
  • DIB4=3
  • DIB5=3
  • DIB6=3
  • DIB7=3
  • DIB8=3
  • DIB9=3
  • DIPB0=3
  • DIPB1=3
  • DIPB2=1
  • DIPB3=1
  • DOB=19
  • DOB0=17
  • DOB1=17
  • DOB10=1
  • DOB11=1
  • DOB12=1
  • DOB13=1
  • DOB14=1
  • DOB15=1
  • DOB16=1
  • DOB17=1
  • DOB18=1
  • DOB19=1
  • DOB2=17
  • DOB20=1
  • DOB21=1
  • DOB22=1
  • DOB23=1
  • DOB24=1
  • DOB25=1
  • DOB26=1
  • DOB27=1
  • DOB28=1
  • DOB29=1
  • DOB3=17
  • DOB30=1
  • DOB31=1
  • DOB4=17
  • DOB5=17
  • DOB6=17
  • DOB7=17
  • DOB8=1
  • DOB9=1
  • DOPB0=1
  • DOPB1=1
  • DOPB2=1
  • DOPB3=1
  • ENB=19
  • SSRB=19
  • WEB=19
SLICEL
  • BX=3418
  • BY=2286
  • CE=6775
  • CIN=3173
  • CLK=8837
  • COUT=3197
  • F1=9942
  • F2=7810
  • F3=5473
  • F4=3045
  • F5=190
  • FXINA=95
  • FXINB=95
  • G1=9969
  • G2=7755
  • G3=5384
  • G4=3023
  • SR=3601
  • X=3263
  • XB=56
  • XQ=7922
  • Y=3459
  • YQ=7257
SLICEL_C1VDD
  • 1=1021
SLICEL_C2VDD
  • 1=949
SLICEL_CYMUXF
  • 0=3482
  • 1=3530
  • OUT=3530
  • S0=3530
SLICEL_CYMUXG
  • 0=3165
  • 1=3197
  • OUT=3197
  • S0=3197
SLICEL_F
  • A1=9942
  • A2=7810
  • A3=5473
  • A4=3045
  • D=10029
SLICEL_F5MUX
  • F=1233
  • G=1233
  • OUT=1233
  • S0=1233
SLICEL_F6MUX
  • 0=95
  • 1=95
  • OUT=95
  • S0=95
SLICEL_FAND
  • 0=32
  • 1=32
  • O=32
SLICEL_FFX
  • CE=6332
  • CK=7922
  • D=7922
  • Q=7922
  • REV=91
  • SR=3166
SLICEL_FFY
  • CE=5645
  • CK=7257
  • D=7257
  • Q=7257
  • REV=6
  • SR=2776
SLICEL_G
  • A1=9953
  • A2=7755
  • A3=5384
  • A4=3023
  • D=10018
SLICEL_GAND
  • 0=31
  • 1=31
  • O=31
SLICEL_GNDF
  • 0=1764
SLICEL_GNDG
  • 0=1507
SLICEL_VDDF
  • 1=48
SLICEL_VDDG
  • 1=32
SLICEL_XORF
  • 0=3072
  • 1=3072
  • O=3072
SLICEL_XORG
  • 0=3106
  • 1=3106
  • O=3106
SLICEM
  • BY=56
  • CE=1
  • CLK=56
  • F1=55
  • F2=55
  • F3=55
  • F4=55
  • G1=55
  • G2=55
  • G3=55
  • G4=55
  • SR=56
  • X=54
  • XQ=1
  • YQ=1
SLICEM_F
  • A1=55
  • A2=55
  • A3=55
  • A4=55
  • D=55
  • DI=55
  • WF1=54
  • WF2=54
  • WF3=54
  • WF4=54
  • WS=55
SLICEM_FFX
  • CE=1
  • CK=1
  • D=1
  • Q=1
SLICEM_FFY
  • CK=1
  • D=1
  • Q=1
SLICEM_G
  • A1=55
  • A2=55
  • A3=55
  • A4=55
  • D=1
  • DI=56
  • WG1=54
  • WG2=54
  • WG3=54
  • WG4=54
  • WS=56
SLICEM_GMC15_BLACKBOX
  • MC15=1
  • WS2=1
SLICEM_WSGEN
  • CK=56
  • WE=56
  • WSF=55
  • WSG=56
 
Software Quality
Run Statistics
Bitgen 30 30 0 0 0 0 0
MAP 16 15 0 0 0 0 0
NGDBuild 28 22 0 0 0 0 0
PAR 15 15 0 0 0 0 0
_compxlibgui 1 1 0 0 0 0 0
cxlgui 1 1 0 0 0 0 0
edif2ngd 1293 1293 0 0 0 0 0
trce 15 15 0 0 0 0 0
xst 28 25 0 0 0 0 0
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUF=98 NGDBUILD_NUM_BUFG=2 NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FD=1651
NGDBUILD_NUM_FDC=91 NGDBUILD_NUM_FDCE=414 NGDBUILD_NUM_FDC_1=34 NGDBUILD_NUM_FDE=6891
NGDBUILD_NUM_FDP=18 NGDBUILD_NUM_FDPE=1154 NGDBUILD_NUM_FDR=510 NGDBUILD_NUM_FDRE=1494
NGDBUILD_NUM_FDRS=28 NGDBUILD_NUM_FDRSE=3 NGDBUILD_NUM_FDR_1=28 NGDBUILD_NUM_FDS=104
NGDBUILD_NUM_FDSE=523 NGDBUILD_NUM_FD_1=41 NGDBUILD_NUM_GND=150 NGDBUILD_NUM_IBUF=27
NGDBUILD_NUM_IBUFDS=21 NGDBUILD_NUM_IBUFGDS=2 NGDBUILD_NUM_INV=2110 NGDBUILD_NUM_IOBUF=8
NGDBUILD_NUM_LUT1=1550 NGDBUILD_NUM_LUT2=3460 NGDBUILD_NUM_LUT2_L=17 NGDBUILD_NUM_LUT3=4143
NGDBUILD_NUM_LUT3_D=42 NGDBUILD_NUM_LUT3_L=35 NGDBUILD_NUM_LUT4=5146 NGDBUILD_NUM_LUT4_D=21
NGDBUILD_NUM_LUT4_L=66 NGDBUILD_NUM_MULT18X18SIO=2 NGDBUILD_NUM_MULT_AND=63 NGDBUILD_NUM_MUXCY=5394
NGDBUILD_NUM_MUXF5=1031 NGDBUILD_NUM_MUXF6=31 NGDBUILD_NUM_OBUF=47 NGDBUILD_NUM_OBUFDS=29
NGDBUILD_NUM_RAM16X1D=54 NGDBUILD_NUM_RAMB16_S18_S18=2 NGDBUILD_NUM_RAMB16_S18_S36=1 NGDBUILD_NUM_RAMB16_S1_S9=16
NGDBUILD_NUM_SRL16=1 NGDBUILD_NUM_SRLC16E=2 NGDBUILD_NUM_VCC=147 NGDBUILD_NUM_XORCY=4835
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUF=102 NGDBUILD_NUM_BUFG=3 NGDBUILD_NUM_FD=1747 NGDBUILD_NUM_FDC=142
NGDBUILD_NUM_FDCE=1374 NGDBUILD_NUM_FDCE_1=6 NGDBUILD_NUM_FDCP=64 NGDBUILD_NUM_FDC_1=39
NGDBUILD_NUM_FDE=7220 NGDBUILD_NUM_FDP=29 NGDBUILD_NUM_FDPE=1157 NGDBUILD_NUM_FDR=580
NGDBUILD_NUM_FDRE=2196 NGDBUILD_NUM_FDRE_1=8 NGDBUILD_NUM_FDRS=28 NGDBUILD_NUM_FDRSE=5
NGDBUILD_NUM_FDR_1=28 NGDBUILD_NUM_FDS=104 NGDBUILD_NUM_FDSE=523 NGDBUILD_NUM_FD_1=41
NGDBUILD_NUM_GND=229 NGDBUILD_NUM_IBUF=43 NGDBUILD_NUM_IBUFDS=21 NGDBUILD_NUM_IBUFG=1
NGDBUILD_NUM_IBUFGDS=2 NGDBUILD_NUM_INV=2210 NGDBUILD_NUM_LUT1=2208 NGDBUILD_NUM_LUT1_L=66
NGDBUILD_NUM_LUT2=4089 NGDBUILD_NUM_LUT2_L=166 NGDBUILD_NUM_LUT3=5477 NGDBUILD_NUM_LUT3_D=42
NGDBUILD_NUM_LUT3_L=335 NGDBUILD_NUM_LUT4=5613 NGDBUILD_NUM_LUT4_D=21 NGDBUILD_NUM_LUT4_L=244
NGDBUILD_NUM_MULT18X18SIO=2 NGDBUILD_NUM_MULT_AND=63 NGDBUILD_NUM_MUXCY=5401 NGDBUILD_NUM_MUXCY_L=1330
NGDBUILD_NUM_MUXF5=1234 NGDBUILD_NUM_MUXF6=95 NGDBUILD_NUM_OBUF=47 NGDBUILD_NUM_OBUFDS=29
NGDBUILD_NUM_OBUFT=8 NGDBUILD_NUM_PULLUP=8 NGDBUILD_NUM_RAMB16_S18_S18=2 NGDBUILD_NUM_RAMB16_S18_S36=1
NGDBUILD_NUM_RAMB16_S1_S9=16 NGDBUILD_NUM_RAMB16_S9=1 NGDBUILD_NUM_SRLC16E=3 NGDBUILD_NUM_TS_TIMESPEC=1
NGDBUILD_NUM_VCC=226 NGDBUILD_NUM_XORCY=6145