LIGO Document E2300322-x0
- The PCIe based LIGO ADC incorporates 8 24 bit 4 channel ADC's into one PCIe board. This board also accepts timing inofrmation for both synchronization and sample triggering. The ADC includes a VCXO which is phase locked to GPS to reduce harmonic noise. This VCXO is the main clock for the ADC.
https://awiki.ligo-wa.caltech.edu/wiki/LIGO%20ADC
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