Testing procedure for the Timing Master/FanOut board Advanced LIGO

Document #:

LIGO-T080083-x0

Document type:

T - Technical notes

Abstract:

Testing schedule:

1. Power Supply Unit (PSU) & on-board voltages
2. Flash PROM & JTAG Interfaces
3. Fiber I/O channels
4. The VCXO circuitry
5. Front-panel LEDs
6. Serial interface (RS422)
7. GPS receiver, antenna & interface*
8. Fiber-delay claculator
9. OCXO interface & PLL circuitry**
10. BNC ports

Files in Document:

None

Topics:

• Data Acquisition System

Authors:

• Daniel Sigg
• Rolf Bork
• Imre Bartos
• Jay Heefner
• Szabolcs Marka
• Paul Schwinberg

Keywords:

Advanced LIGO Timing System Master FanOut Test

Referenced by:

• LIGO-E090002-v1: Chassis Integration Plan Master and FanOut Modules Advanced LIGO
• LIGO-T0900032-v1: AdvLIGO Sample Clock Time Distribution System Final Design Review
• LIGO-E090003-v1: Timing System Document Map Advanced LIGO