IO Interface Backplane (LVDS)
- Document #:
- LIGO-D2000297-v1
- Document type:
- D - Drawings
Other Versions:
| LIGO-D2000297-v2
01 Sep 2021, 14:18 |
- Abstract:
- This is a new IO backplane that will interface the PCIe timing board. It uses LVDS lines on a DB37 connector to provide clock signals to individual slots.
- Files in Document:
-
- D2000297-v1.pdf (1.5 MB)
- ICS/JIRA Record:
-
- ICS_LINK
- Topics:
- Authors:
