looking at page 6 of https://dcc.ligo.org/DocDB/0011/T1000220/001/ESD_PA95_circuit_diags_comp_overlays_1_of_6.pdf
The monitor gain for the ETM bias is actually 0.0437, while V12 of this document says 0.025 on page 4
Also on page 4 in this document, the ETM ESD LV monitor board (D1500389) is described having a DC gain of 0.25, I think that it is really a DC gain of 2.
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