LIGO Document D1400301-v15

ETM and ITM ESD Low Voltage Driver Block Diagrams

Document #:
LIGO-D1400301-v15
Document type:
D - Drawings
Other Versions:
LIGO-D1400301-v14
12 Sep 2016, 08:19
LIGO-D1400301-v13
10 Mar 2016, 16:58
LIGO-D1400301-v12
17 Feb 2016, 13:23
LIGO-D1400301-v11
26 Mar 2015, 11:56
LIGO-D1400301-v10
18 Mar 2015, 17:18
LIGO-D1400301-v9
21 Jan 2015, 16:14
Abstract:
A block diagram showing the proposed design topology for a chassis that allows transition to a low voltage drive mode for noise reduction in the ESD drive chain on the ETMs. This chassis also provides a 40vp-p drive capability. Scattered features existing in the initial ESD subsystem installation (bias voltage low pass filter, 10kohm series resistors) are consolidated into this design.
Files in Document:
Other Files:
Keywords:
ESD
Notes and Changes:
V15 Changed the DAC filtration block from Pole/Zero 2.2/50Hz to 2.2/15Hz per ECR E1800233. Added details associated with old ECR E1600230 for PI Correction while in HV mode. Per E1500443, changed the monitoring amplifier Low Pass corner frequency from 43.5kHz to 43.5Hz
Related Documents:
Associated with Events:
held from 28 Oct 2014 to 29 Oct 2014 in LHO/OSB front room

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